1. Field of the Invention
The present invention relates to an electromagnetic flow meter, and more particularly to an electromagnetic flow meter in which the power consumption of an exciting circuit can be reduced.
2. Description of the Related Art
As shown in FIG. 8, an exciting circuit of an electromagnetic flow meter of the related art is configured by a DC power source E, a capacitor C which is connected in parallel to the DC power source E, and an exciting coil COIL. In the figure, Q1 to Q4 denote switching elements each configured by an FET, and D1 to D4 denote parasitic diodes which are connected in parallel to the switching elements Q1 to Q4 and in a direction opposite to the current flow from the DC power source E. The parasitic diodes D1 to D4 are formed in a package during a process of producing the respective FETs, and hence cannot be removed away.
The switching elements Q1, Q2 are FETs which operate while being supplied with a second reference voltage and grounded to a voltage V2, and the switching elements Q3, Q4 are FETs which operate while being supplied with a voltage V1 grounded to a third reference voltage. The voltage V1 is produced at the midpoint of a series connection of a resistor R1 and a Zener diode ZD1 which are connected in parallel to the DC power source E, and the voltage V2 is produced at the midpoint of a series connection of a Zener diode ZD2 and a resistor R2 which are connected in parallel to the DC power source E.
One end (positive side) of the DC power source E is connected to one end 13 of the exciting coil COIL via the switching element Q1. The one end 13 is connected to the other end (negative side) of the DC power source E via the switching element Q3.
The other end 14 of the exciting coil COIL is connected to a first reference voltage, and also to one end of a detection resistor R11 for an exciting current. Furthermore, the one end (positive side) of the DC power source E is connected to the other end 15 of the detection resistor R11 via the switching element Q2. The other end 15 is connected to the other end (negative side) of the DC power source E via the switching element Q4.
The reference numerals T1 and T2 denote timing signals for controlling ON/OFF operations of the switching elements Q1 and Q2 which operate while being supplied with the second reference voltage and grounded to the voltage V2. The timing signals are supplied to the control electrodes of the switching elements Q1 and Q2 (the gates of the FETs) via resistors R3 and R5, isolators P1 and P2 such as photocouplers, and waveform-shaping circuits B1 and B2, respectively. The isolators P1 and P2 are insulating circuits for converting the references of the timing signals T1, T2 which have different reference voltages, to which the second reference voltage is supplied via resistors R4 and R6, and which are grounded to the voltage V2.
The reference numerals T3 and T4 denote timing signals for controlling ON/OFF operations of the switching elements Q3 and Q4 which operate while being supplied with the voltage V1 and grounded to the third reference voltage. The timing signals are supplied to the control electrodes of the switching elements Q3 and Q4 (the gates of the FETs) via resistors R7 and R9, isolators P3 and P4 such as photocouplers, and waveform-shaping circuits B3 and B4, respectively. The isolators P3 and P4 are insulating circuits for converting the references of the timing signals T3, T4 which have different reference voltages, to which the voltage V1 is supplied via resistors R8 and R10, and which are grounded to the third reference voltage.
The exciting current flows alternately in opposite directions through the exciting current detection resistor R11 connected in positive and negative exciting periods. Therefore, a reference voltage VREF which is positive or negative in accordance with the positive and negative exciting periods, and which is proportional to the exciting current is generated between the one end 14 grounded to the first reference voltage, and the other end 15.
The configuration and operation of a controlling circuit which generates the timing signals T1 to T4 for ON/OFF-controlling the switching elements Q1 to Q4 will be described with reference to FIG. 9.
The reference numeral 11 denotes an excitation timing generating circuit which regulates the positive and negative exciting periods, and generates a rectangular wave of a predetermined excitation period. A direct output is supplied as the timing signal T4 to the switching element Q4, and an inverted output through an inverter G3 is supplied as the timing signal T3 to the switching element Q3.
The reference numeral 12 denotes an excitation controlling circuit. In the circuit, the reference voltage VREF which is proportional to the exciting current, and which is positive or negative is supplied to a negative input terminal of a hysteresis comparator CMP. An output of the hysteresis comparator CMP is supplied to AND gates G1, G2, and in addition fed back to a positive input terminal of the hysteresis comparator CMP via a voltage dividing circuit of positive feedback resistors R11, R12. The reference numeral Vs denotes a reference DC power source (reference voltage Vs) which is connected between the resistor R11 and the ground serving as the first reference voltage.
The hysteresis comparator CMP operates in the following manner. When the absolute value of the reference voltage VREF is increased to be larger than the reference voltage Vs, and further increased to be larger than the voltage which is determined by the positive feedback resistors R11, R12, and which corresponds to the hysteresis width, the output is inverted from negative to positive. By contrast, when the absolute value of the reference voltage VREF is decreased to be smaller than the reference voltage Vs, and further decreased to be smaller than the voltage which is determined by the positive feedback resistors R11, R12, and which corresponds to the hysteresis width, the output is inverted from positive to negative. This inverting operations are repeated. The period of the inverting operations depends on the time constant of the control loop including the inductance of the exciting coil COIL, and is designed so as to be sufficiently shorter than the periods of the excitation timing signals.
The AND gate G1 receives the output signals of the hysteresis comparator CMP and the excitation timing generating circuit 11, and sends out the timing signal T1 in accordance with the logical product of the output signals. Similarly, the AND gate G2 receives the output signal of the hysteresis comparator CMP and the inverted output of the excitation timing generating circuit 11, and sends out the timing signal T2 in accordance with the logical product of the output signals.
FIG. 10 illustrates the ON/OFF situations of the switching elements Q1 to Q4 and a switching control mode in the positive and negative exciting periods in the above described configuration. First, by the excitation timing signals T3, T4, in the positive exciting period, the switching element Q3 is regulated to be turned OFF and the switching element Q4 is regulated to be turned ON, and, in the negative exciting period, the switching element Q3 is regulated to be turned ON and the switching element Q4 is regulated to be turned OFF.
In the positive exciting period, the switching element Q2 is turned OFF, and the switching control is conducted by the switching element Q1, and, in the negative exciting period, the switching element Q1 is turned OFF, and the switching control is conducted by the switching element Q2. As a result of the control on the switching elements Q1, Q2, Q3, Q4, in the positive exciting period, the current indicated by i1 in FIG. 10 flows through the switching element Q1, the exciting coil COIL, the reference resistor R11, and the switching element Q4.
The current indicated by i2 in FIG. 10 is a current which is caused to flow through the parasitic diode D3 connected in parallel to the switching element Q3, by an counter electromotive force of the exciting coil COIL when the switching element Q1 is OFF.
In the negative exciting period, a current which is similar to the current i1 flows through the switching element Q2, the detection resistor R11, the exciting coil COIL, and the switching element Q3, so that a constant current control is conducted.
JP-A-2002-188945 (pages 2 and 3, FIG. 3) is referred to as a related art.
In the exciting current of the switching system of the related art, the circuit current flows different paths depending on the ON/OFF states of the switching elements. When the exciting current flowing through the exciting coil is to be controlled, therefore, a current detection resistor for the control must be connected in series to the exciting coil.
Therefore, since the exciting circuit which has the switching elements, and the controlling circuit which produces the timing signals use different signal references, it is required to have different respective power sources. When the timing signals produced in the controlling circuit are to be used in the exciting circuit, consequently, insulating circuits such as isolators must be disposed. As a result, reduction of the power consumption is limited.